Description

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Thesis: MRVL is a leading enabler of several powerful secular growth themes including generative AI, cloud computing, and faster data networks, yet the stock has lagged due to cyclical weakness in some of its end markets. We believe the story is inflecting with accelerating secular growth for the next several years along with troughing cyclical segments that are now improving. We think the company can earn $4.00-4.50 of EPS in CY26, driving 50-70% upside to the stock while assuming significant multiple compression to 25x P/E (from 34x today).

Background:

Marvell is a leading fabless provider of compute, networking, and storage semiconductor chips primarily serving infrastructure applications. Its products are used in the data center, enterprise, carrier, auto / industrial, and consumer end markets. MRVL has successfully executed a transformational business turnaround starting in 2016 after Starboard got involved, pushed out the founders, and installed a completely new management team and board who refocused the company on the right end markets and products. From 2010-2016, MRVL was mainly a consumer HDD-exposed storage company in secular decline with deteriorating market share, as HDDs were being cannibalized by SSDs in consumer applications (e.g. PCs, gaming consoles, personal storage). Under the leadership of new CEO Matt Murphy, the company made a series of large and accretive acquisitions and divestitures to transform the portfolio. The Consumer end market has shrunk from 62% of revenue in CY16 to only 12% of revenue in CY22 and MRVL now has a number of strong franchises with stable-to-increasing market share across several secular growth infrastructure markets that are among the fastest growing and most attractive areas of the semiconductor industry (AI, cloud data center, 5G, automotive).

Data Center Networking Overview:

There are several layers that connect the data center ecosystem together, and to help visualize that let’s trace the flow of data to your end device. Starting at the bottom you have each individual server which has compute (CPU), memory (DRAM), storage (HDD/SSD), networking interface card (NIC), and sometimes AI accelerators like Graphics Processing Units (GPUs). Servers are arranged in big racks and out of every individual server you have wires connecting the NIC inside to a top of rack “switch.” Then there are several layers of switches that are all connected together, and to aggregate all that data you need high performance optical transceivers. This means digital data needs to be converted by the transceivers into light beams blasted by lasers across fiber optic cables. Optical cables outside the data center go underground to other data centers or base stations operated by the telecom companies. In each base station, optical wire leads from underground, through the baseband unit (basically a server at the bottom), up the pole, then is transmitted through the radio unit at the top of the pole to your cell phone. From your phone, data is sent back to the base station, then through the same chain all the way back to the server.

A major trend in computing is applications are becoming more complex, requiring higher processing power to service, exacerbated by the uptake of AI applications. As a result, the data center needs higher computing power CPUs and GPUs to process these applications and also needs to connect more of these systems together to enable massive parallel processing and elastic scaling up and scaling down of these resources. This is causing data centers to become more networking-intensive to connect everything together. Additionally, networking semiconductor providers such as MRVL and AVGO are adding more value and gaining wallet share by integrating more processor functionality using a SmartNIC or DPU to offload network and security processing functions from the main CPU. This improves overall system performance and frees up CPU workloads for revenue-generating functions.

Marvell Business Segments and Product Overview:

Marvell reports results in five segments: data center, carrier infrastructure, enterprise networking, auto / industrial, and consumer. Below we give an overview of the products by segment.

• Data Center (40% of revs): Marvell has an end-to-end portfolio of networking chip families that are the “brains” for transmitting and receiving data during each step of this process, from inside the server, to the switch, the optical interconnects, the baseband, and all the way through to the radio unit, as well as the processors that control storage devices (HDD/SSD controllers). The Company is also beginning to provide customized ASIC solutions for various compute, AI/ML, networking, storage, and security use cases that involve additional processing to capture more value in the ecosystem. Custom ASICs are purpose-built for a specific application and customer using MRVL’s IP blocks that make the chip design possible.
• Carrier Infrastructure (20% of revs): Marvell provides processors and network chips used for wired and wireless applications in telecom base stations. Wired applications include Ethernet switches and coherent optical DSPs. Wireless applications are MRVL’s OCTEON family of processors used for signal processing in 5G base stations.
• Enterprise Networking (22% revs): Marvell provides compute and networking chips for enterprise wired switches / routers, wireless access points, and processors for network appliances such as firewalls.
• Auto/Industrial (7% of revs): Marvell provides networking chips to enable an Ethernet networking backbone in vehicles (supporting EV, ADAS, and autonomous driving functions) and industrial Ethernet switches.
• Consumer (11% of revs): Marvell provides networking, compute, and storage chips for the Sony Playstation 5, printers, broadband gateways, PCs, and set top boxes.

Thesis point 1: Networking is the bottleneck for performance in AI applications, requiring higher-end semiconductors to handle. This means networking semiconductor capital intensity is going higher and demand for optical DSPs in particular, which directly benefits MRVL.

Data center bandwidth is growing exponentially, as bandwidth growth drives a virtuous cycle that ultimately requires more bandwidth, exacerbated by AI that brings a step function change in the amount of compute power and associated networking bandwidth required. Because training workloads are so computationally intensive, a single workload is be spread across multiple servers which all need to be connected together with the highest bandwidth, low latency way to function as one system. Latency becomes an issue so AI systems need to use the highest throughput networking gear possible that are built on 5nm leading edge technology. However, even with power usage per gigabit improvements from generation to generation, networking power / $ spend as a percentage of the total data center are increasing generation to generation. Networking capex intensity in AI deployments can be 2-3x higher vs traditional workloads.

As it relates to MRVL, the company has a complete end-to-end networking portfolio of switches, optical DSPs, and custom ASICs to capitalize on this accelerating spend by cloud customers. While AVGO dominates Ethernet switching and frankly has a better switch than MRVL today, MRVL has a market dominating optical DSP acquired through their 2021 acquisition of IPHI with ~75% market share in PAM4 (within the data center) and is one of the leaders in DCI and coherent DSPs (used between data centers and base stations). High-speed PAM4 DSPs are key to reducing networking bottlenecks and latency. We believe PAM4 optical will be a significant growth driver for MRVL, growing at a 30%+ CAGR over the coming years as it is directly levered to AI deployments as well as where the rest of the cloud networking market is heading (toward higher bandwidths). For every GPU deployed, the attach rate of DSPs is > 1:1 as you need a DSP on both ends of the wire connecting the GPU to the switch, and several more DSPs in other parts of the network. People also miss that PAM4 is agnostic between Infiniband and Ethernet and MRVL wins with either technology.

There is some competitive tech risk in 2026+ via Linear Direct Drive and Co-Packaged Optics, but those solutions have technological disadvantages and are still in testing phase. They are worth monitoring but not disruptive at this stage.

To summarize this thesis point, the networking pie is getting larger driven by AI, optical DSPs should accelerate the most within networking, and MRVL dominates the optical market with a clear visibility into several years of strong growth.

Thesis point 2: Major secular trends in data center architecture are playing to MRVL’s strengths as an arms dealer of leading edge infrastructure technology. As Moore’s Law slows, the adoption of custom silicon (ASICs) tailored for specific applications is a mega-trend that is key to advancing the computing performance vs. cost curve. We think MRVL’s custom ASIC business is a direct beneficiary of this trend and can grow to a $1.5-2B revenue business by CY26.

Since the invention of the semiconductor in 1947, there have been two major forces driving the pace of semiconductor innovation: 1) Moore’s Law, which generally stated either the computational capacity of a chip could double or the power consumption at the same number of transistors could fall by 50% every two years due to being able to pack higher density of transistors into a chip as the size of transistors shrunk due to improved manufacturing technology, and 2) creative advancements in chip architectures can generate additional performance and power consumption improvements. However, starting in the mid-2010s around the 20nm production node, Moore’s law not only slowed, but the cost per transistor trend began going up. For traditional x86 architecture-based CPUs, Moore’s Law slowing means PC & server costs have to go up in order to remain on the same pace of performance improvement. This means as demand for computational power increases as demand for more complex software applications increase (e.g. generative AI), operators of computing hardware have to charge more over time for the same units of compute, which is a massive problem and slows innovation.

To address this problem with Moore’s Law, the industry has become more creative in designing and adopting alternative chip architectures that do things differently than x86-based CPUs. GPUs are the most widespread example of this adaptation today. GPUs are more specialized for tasks like AI and are what have enabled performance advancements for AI applications to continue without destroying the economics of running these applications. In other words, as the force of Moore’s Law has slowed, the second force of alternative types of chip architectures has accelerated. The trade-off for specialized, higher performance is less processing flexibility and higher upfront costs to develop the new architecture. Whereas a traditional CPU can run any workload at lower speeds, GPUs can only run a few specific tasks like graphics/AI at faster speeds. This trend shifted some areas of computing from “homogenous” where everything ran on general purpose x86 CPUs that could do all things but no things well to heterogenous where various off-the-shelf products such as GPUs or FPGAs are used where their inherent performance is superior to CPUs. That said, GPUs were actually designed for graphics processing and are not custom-tailored for AI-specific applications, which is resulting in cost inefficiencies. As a result, the computing world is now in the early stages of moving from homogenous and heterogeneous “general purpose” computing to cloud-optimized silicon, meaning each task or application is run by an ASIC that has been specifically designed for optimal performance of that task. As validation of this secular trend, even NVDA is reported to have begun working on custom silicon solutions.

MRVL’s custom ASIC business co-designs specific products with customers to mix and match the chip’s building blocks to produce the most optimized product for an application. In terms of what gives MRVL these capabilities, the Company has assembled one of the most comprehensive IP portfolios of building blocks required to design a chip from its nearly 30 years of R&D development and various acquisitions. Of them all, the most important technology that MRVL possesses is high speed SerDes (Serializer/Deserializer), which determines the speed that data can be moved in / out of the chip and is the core bottleneck for the rest of the system. There are only 2-3 companies in the world with leading edge SerDes (AVGO main competitor), and MRVL is the new entrant with an improved reputation and gaining share.

In terms of revenue, Marvell previously guided to run rate $800M of custom silicon revenue between FY25/26. As AI infrastructure investments began to inflect in mid-2023, Marvell is now running well north of those targets and in January 2024, there was a material tone shift from management. The CEO said during a fireside that based on the current wins and customer production plans and forecasts, they "expect to significantly exceed that number" and that the custom silicon business could be similar to the size of the optical business in a few years (ie in the billions). We think MRVL’s custom silicon business could be $1.5-2B in a few years, with significant wins at AMZN (including Trainium 2), GOOGL, and others.

Taiwan custom silicon players like Alchip and GUC had some of the early design wins in the space and show the equity upside as these wins start ramping. Their market caps are up 2-5x or $10B USD of value LTM and trade >50x P/E. If the market capitalizes MRVL’s wins anywhere near these Taiwan players, the stock could be up 50% on this alone

Thesis point 3: Marvell’s cyclical end markets are troughing and starting to inflect higher which will add another leg to the earnings acceleration.

After 12 months of negative revisions due to the company’s cyclical end markets, Street numbers toughed last May and are likely about to start going up again. The Enterprise Networking, Carrier, and Storage segments make up 50% of the business have been undergoing a period of digestion and dampening the upside from secular growth opportunities.

Enterprise Networking and Carrier FY25 estimates have been cut by 35-40% over the last year. Carrier demand was impacted following the roll out of 5G and subsequent digestion, but is starting to show signs of improvement. Enterprise Networking demand was inflated in the covid era and is also undergoing a period of digestion and undershipping, but will eventually recover as MRVL is a share gainer at the margin. Storage (within the data center segment) is normally 15% of the business but was running half of that last year as cloud demand was also elevated during covid and needed to go through a period of digestion. This end market is already showing signs of improvement exiting 2023, with key hyperscale HDD demand (as per STX/WDC) starting to improve.

The point here is these cyclical businesses are not structurally broken and it is a matter of when, not if, the earnings recover which we think is soon.

Valuation:

Street has EPS growing 30% this year, we’re above that and think the company could earn $4.00-4.50 in CY26. Putting a very conservative 25x multiple on that (significant multiple compression from the current 34x NTM P/E) you get a $100-110 stock or 50-70% stock upside. In terms of downside risk, normalized earnings should be at least $3.25 for the company, and assuming just a 20x P/E, we get a downside scenario very close to the current stock price ~65.

Catalyst

Earnings upgrades